## IC 74157 PDF

Quad 2-line to 1-line Data Selectors/multiplexers. This X24C02 device has been acquired by IC Microsystems Sdn Bhd from Xicor, Inc. The X24C02 is. The LSTTL / MSI SN54 / 74LS is a high speed Quad 2-Input Multiplexer. Four bits of data from two sources can be selected using the common Select. S, 1 •, 16, Vcc. 1I0, 2, 15, E. 1I1, 3, 14, 4I0. 1Y, 4, 13, 4I1. 2I0, 5, 12, 4Y. 2I1, 6, 11, 3I0. 2Y, 7, 10, 3I1. GND, 8, 9, 3Y. Pin, Symbol, Description. 1, S, common data.

Author: | Fesida Nelkree |

Country: | Pakistan |

Language: | English (Spanish) |

Genre: | Love |

Published (Last): | 24 May 2005 |

Pages: | 57 |

PDF File Size: | 19.84 Mb |

ePub File Size: | 2.56 Mb |

ISBN: | 198-8-32537-298-9 |

Downloads: | 32478 |

Price: | Free* [*Free Regsitration Required] |

Uploader: | Vudozilkree |

A binary comparator is a logical circuit which carries out the comparison between 2 generally noted binary numbers A and B.

## Quad 2-line to 1-line data selectors / multiplexers 74157

Return to the synopsis. The stitching of this circuit is given on figure 21, while figure 22 represents its logic diagram. The number of the inputs of a multiplexer defines the number of ways of a multiplexer. Iv is translated in the table of figure High of page Preceding page Following page. Using one or several entries of order, one switches one of the inputs towards the exit. Its equation is thus A.

How to make a site? That is to say to compare the two binary digits A and B.

By putting in series two comparatorsone can compare two numbers of 8 bits. According to the state of the entry of selection Athe exit S recopy either the If entry, or the D1 entry.

A multiplexer can thus switch data made up of several bits. Static page of welcome.

### – Quad 2-input multiplexer – ChipDB

For example for a multiplexer with 4 waysone needs 2 entries of order. We deduce the equation from it from S following: In general, the selected entry carries in index the state corresponding to the combination of the entries of order.

Dynamic if of welcome. The combinative network of figure 26 can provide the signal S. Thus, one can compare numbers of 8, 12, 16 bits…. The first circuit compares the weak weights of A with the weak weight of B.

### Quad 2-line to 1-line data selectors / multiplexers – Robotech Shop

These circuits have several inputs iic only one exit. The number of the entries of order is a function of the number of ways of the multiplexer. Electronic forum and Infos. If a multiplexer has n input, it is said that it is about a multiplexer with n ways.

Forms maths Geometry Physics 1. Form 744157 the perso pages. The integrated circuit is a quadruple multiplexer with 2 ways at entry of common selection.

Click here for the following lesson or in the synopsis envisaged to this end. All these considerations are translated in 7415 truth table of figure When this entry is with state 1it is the data Bi which is transferred in Yi. The stitching and the logic diagram of this circuit are given on figure To contact the author. This table, one can extract the equation from the exit S following: The 741157 circuit is a comparator 4 bitsi.