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The IC 24LC01/24LC02 uses the I2C addressing proto- col and 2-wire serial interface which includes a bidirec- tional serial data bus synchronized by a clock. Microchip 24LC02 EEPROM are available at Mouser Electronics. Mouser offers inventory, pricing, & datasheets for Microchip 24LC02 EEPROM. Description, Bit/Bit Serial EePROM Write Protect Memory Chips. Company, Pronics. Datasheet, Download 24LC02 datasheet. Quote. Find where to.

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These three bits must compare to their corresponding hard-wired input pins. Write operation with built-in timer. Input Capacitance See Note. If not, the chip will return to a standby state.

For relative timing, refer to timing diagrams. After receiving the 8-bit data word, the EEPROM will output a zero and the address- ing device, such as a microcontroller, must terminate the write sequence with a stop con- dition. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.

Document Outline

Partial page write allowed. Serial clock data input.

Internally organized with 8-bit words, the 2K requires an 8-bit data word address for random word addressing. Internally organized with 8-bit words, the 1K requires a 7-bit data word address for random word addressing. After this period the first clock pulse is generated. Data Input Dahasheet Time.


Once the stop condition for a write command has been issued from the master, the device initiates the internally timed write cycle. Hardware controlled write protection. Search field Part name Part description. Characteristics Functional Description Timing Diagrams. The device address word consist of a mandatory one, zero sequence for the first four most significant bits refer to the diagram show- ing the Device Address.

A page write is initiated the same as byte write, but the microcontroller does not send a stop condition after the first data word is clocked in. The microcontroller must terminate the page write sequence with a stop condition.

The pin is open-drain driven and may be wired-OR with any number of other open-drain or open collector devices.

This happens during the ninth clock cycle. These are stress ratings only. Stresses exceeding the range specified under “Absolute Maxi. The device is optimized for use in many industrial and com. Upon receipt of this ad- dress, the EEPROM will again respond with a zero and then clock in the first 8-bit data word.

ACK polling can be initiated immediately.

24LC02 Datasheet(PDF) – Ceramate Technical

Output Valid from Clock. If the device is still busy with the. Commerical temperature range 0. Data transfer may be initiated only when the. Since the device will not acknowledge during a write cycle, this can be used to determine when the cycle is complete this feature can be used to maximize bus throughput. Clock and data transition. The higher data word address bits are not incremented, re- taining the memory page row location refer to Page write timing.


24LC02 (HOLTEK) PDF技术资料下载 24LC02 供应信息 IC Datasheet 数据表 (4/8 页)

Time in which the bus must be free before a new transmission can start. A write operation requires an 8-bit data word address following the device address word and acknowledgment.

During data transfer, the data line must remain stable whenever the clock line is high. Output Capacitance See 24lx02.

24LC02 PDF Datasheet浏览和下载

A read operation is initi- ated if this bit is high and a write operation is initiated if this bit is low. Instead, after the EEPROM ac- knowledges the receipt of the first data word, the microcontroller can transmit up to seven more data words.

The SDA pin is bidirectional for serial data transfer. Data Input Hold Time.